Gemini Guidance Computer

Gemini Guidance Computer
Gemini Guidance Computer in National Air and Space Museum
Invented by	IBM Federal Systems Division
Manufacturer	IBM Federal Systems Division
Introduced	1965; 59 years ago (1965)
Discontinued	1966; 58 years ago (1966)
Type	Avionics Guidance Computer
Processor	Discrete Components ^[1]
Frequency	7.143 kilohertz clock
Memory	39-bit words memory, each composed of three 13-bit syllables, 4,096 words of memory, in a ferrite core array.
Ports	Modular Display Keyboard (MDK), Modular Display Readout (MDR), Attitude Control and Maneuver Electronics (ACME), Inertial Measurement Unit (IMU), Horizon Sensors, Time Reference System (TRS)^[2]
Weight	58.98 lb (26.75 kg)
Dimensions	18.9 in × 14.5 in × 12.75 in (48.0 cm × 36.8 cm × 32.4 cm) (H)×(W)×(D)

The Gemini Guidance Computer (sometimes Gemini Spacecraft On-Board Computer (OBC)) was a digital, serial computer designed for Project Gemini, America's second human spaceflight project.^[3] The computer, which facilitated the control of mission maneuvers, was designed by the IBM Federal Systems Division.^[4]

Functionality

Project Gemini was the first with an on-board computer, as Project Mercury was controlled by computers on Earth.^[5] The Gemini Guidance Computer was responsible for the following functions:^[4]^[3]

Ascent – serves as a backup guidance system. The switchover is manually controlled by the astronauts
Orbital flight – gives the astronauts the capacity to navigate, allowing them to choose a safe landing spot in an emergency and calculate the timing of retrofire (on extended missions ground data may become unavailable when ground data network rotates out of the orbital plane).
Rendezvous – serves as primary reference by providing guidance information to the astronauts. The orbit parameters are determined by the ground tracking which are then sent to the spacecraft; the guidance computer was responsible for processing the information along with sensed spacecraft attitude. The information was presented to the astronauts in terms of spacecraft coordinates.
Reentry – feeds commands directly to the reentry control system for automatic reentry or provides the guidance information to the astronauts for manual reentry.

Specs

The computer was architecturally similar to the Saturn Launch Vehicle Digital Computer, in particular in the instruction set;^[6] however its circuit integration was less advanced.^[7] The GGC weighed 58.98 pounds (26.75 kg) and was powered by 28V DC. During a short power outage it could be powered by the Auxiliary Computer Power Unit (ACPU)
39-bit words memory, each composed of three 13-bit syllables^[6]
Ferrite core memory of 4,096 words^[8]
Two's complement integer arithmetic
7.143 kilohertz clock (140 µs per instruction); all instructions took a single cycle except for multiplication and division

References

^ "Ch1-2".
^ "The Gemini Spacecraft Computer".
^ ^a ^b McDonnell Corporation, NASA Project Gemini Familiarization Manual, 1965, vol. 2, pp. 8.7,8.45.
^ ^a ^b 8. J. C. Hundley and R. A. Watson, "A Digital Computer in Orbital Flight," TR 63-825-892, IBM Federal Systems Division, Owego, New York, October 1964.
^ Tomayko, James E. (1988). "The Gemini Digital Computer: First Machine in Orbit". Computers in Spaceflight: The NASA Experience. Washington, D.C.: National Aeronautics and Space Administration. Retrieved 2015-01-04.
^ ^a ^b "Gemini Spacecraft Computer (OBC): Layout of Memory Words". 2016 [2011]. Archived from the original on 2016-05-28. Retrieved 2016-05-28.
^ LVDC board reverse engineering project
^ Computers in Spaceflight: The NASA Experience, chapter one

External links

Wikimedia Commons has media related to Gemini Guidance Computer.

Gemini Spacecraft On-Board Computer (OBC)
Gemini Program Overview
IBM and the Gemini Program

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Project Gemini

Missions

Uncrewed	Gemini 1 2
Crewed	Gemini 3 4 5 7 6A 8 9A 10 11 12

Astronauts

Gemini 3: Gus Grissom (command pilot), John Young (pilot)
Gemini 4: James McDivitt (command pilot), Ed White (pilot)
Gemini 5: Gordon Cooper (command pilot), Pete Conrad (pilot)
Gemini 7: Frank Borman (command pilot), Jim Lovell (pilot)
Gemini 6A: Wally Schirra (command pilot), Tom Stafford (pilot)
Gemini 8: Neil Armstrong (command pilot), David Scott (pilot)
Gemini 9A: Tom Stafford (command pilot), Gene Cernan (pilot)
Gemini 10: John Young (command pilot), Michael Collins (pilot)
Gemini 11: Pete Conrad (command pilot), Richard Gordon (pilot)
Gemini 12: Jim Lovell (command pilot), Buzz Aldrin (pilot)

Components

Launch sites

Cape Canaveral Air Force Station Launch Complex 19 / Launch Complex 14

Developments

v t e Guidance computers
On crewed spacecraft	Apollo Abort Guidance System Apollo Guidance Computer Gemini Guidance Computer IBM TC-1 IBM AP-101
On launch vehicles	ATHENA computer ASC-15 D-17 Launch Vehicle Digital Computer Universal Space Guidance System
Category:Guidance computers

Processor technologies

Models

Architecture

Instruction set
architectures

Types	Orthogonal instruction set CISC RISC Application-specific EDGE TRIPS VLIW EPIC MISC OISC NISC ZISC VISC architecture Quantum computing Comparison Addressing modes
Instruction sets	Motorola 68000 series VAX PDP-11 x86 ARM Stanford MIPS MIPS MIPS-X Power POWER PowerPC Power ISA Clipper architecture SPARC SuperH DEC Alpha ETRAX CRIS M32R Unicore Itanium OpenRISC RISC-V MicroBlaze LMC System/3x0 S/360 S/370 S/390 z/Architecture Tilera ISA VISC architecture Epiphany architecture Others

Execution

Instruction pipelining	Pipeline stall Operand forwarding Classic RISC pipeline
Hazards	Data dependency Structural Control False sharing
Out-of-order	Scoreboarding Tomasulo's algorithm Reservation station Re-order buffer Register renaming Wide-issue
Speculative	Branch prediction Memory dependence prediction

Parallelism

Level	Bit Bit-serial Word Instruction Pipelining Scalar Superscalar Task Thread Process Data Vector Memory Distributed
Multithreading	Temporal Simultaneous Hyperthreading Simultaneous and heterogenous Speculative Preemptive Cooperative
Flynn's taxonomy	SISD SIMD Array processing (SIMT) Pipelined processing Associative processing SWAR MISD MIMD SPMD

Processor
performance

Transistor count
Instructions per cycle (IPC)
- Cycles per instruction (CPI)
Instructions per second (IPS)
Floating-point operations per second (FLOPS)
Transactions per second (TPS)
Synaptic updates per second (SUPS)
Performance per watt (PPW)
Cache performance metrics
Computer performance by orders of magnitude

Types

By application	Embedded system Microprocessor Microcontroller Mobile Ultra-low-voltage ASIP Soft microprocessor
Systems on chip	System on a chip (SoC) Multiprocessor (MPSoC) Cypress PSoC Network on a chip (NoC)
Hardware accelerators	Coprocessor AI accelerator Graphics processing unit (GPU) Image processor Vision processing unit (VPU) Physics processing unit (PPU) Digital signal processor (DSP) Tensor Processing Unit (TPU) Secure cryptoprocessor Network processor Baseband processor

Word size

Core count

Components

Functional units	Arithmetic logic unit (ALU) Address generation unit (AGU) Floating-point unit (FPU) Memory management unit (MMU) Load–store unit Translation lookaside buffer (TLB) Branch predictor Branch target predictor Integrated memory controller (IMC) Memory management unit Instruction decoder
Logic	Combinational Sequential Glue Logic gate Quantum Array
Registers	Processor register Status register Stack register Register file Memory buffer Memory address register Program counter
Control unit	Hardwired control unit Instruction unit Data buffer Write buffer Microcode ROM Counter
Datapath	Multiplexer Demultiplexer Adder Multiplier CPU Binary decoder Address decoder Sum-addressed decoder Barrel shifter
Circuitry	Integrated circuit 3D Mixed-signal Power management Boolean Digital Analog Quantum Switch